 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| CY7C65640A TetraHubTM High Speed USB Hub Controller Features . Integrated upstream and downstream series termination resistors Configurable with external SPI EEPROM Number of Active Ports Number of Removable Ports Maximum Power Hub Controller Power Power-On Timer Overcurrent Timer Disable Overcurrent Timer Enable Full Speed Only Disable Port Indicators Gang Power Switching Enable Single TT Mode Only Enable NoEOPatEOF1 USB 2.0 hub Four downstream ports Multiple transaction translators - one per downstream port for maximum performance VID, PID, and DID configured from external SPI EEPROM 24 MHz external crystal Small package - Quad Flat Pack, no leads (QFN) Integrated upstream pull up resistor Integrated downstream pull down resistors for all downstream ports Logic Block Diagram D+ D- High speed USB Control Logic SPI Communication Block SPI_SCK SPI_SD SPI_CS USB 2.0 PHY 24 MHz Crystal Serial Interface Engine PLL USB Upstream Transaction Translator (X4) Hub Repeater TT RAM Routing Logic USB Downstream USB Downstream USB Downstream USB Downstream USB Port Pow- Port 2.0 er Control Sta- USB Port Pow- Port 2.0 er Control Sta- USB Port Pow- Port 2.0 er Control Sta- USB Port Pow- Port 2.0 er Control Sta- D+ D- PWR#[1 OVR#[1LED D+ D- PWR#[2 OVR#[2LED D+ D- PWR#[3 OVR#[3LED D+ D- PWR#[4 OVR#[4LED Cypress Semiconductor Corporation Document #: 38-08019 Rev. *J * 198 Champion Court * San Jose, CA 95134-1709 * 408-943-2600 Revised February 10, 2009 [+] Feedback CY7C65640A Introduction Cypress's TetraHubTM is a high-performance self-powered Universal Serial Bus (USB) 2.0 hub. The Tetra architecture provides four downstream USB ports, with a Transaction Translator (TT) for each port, making it the highest-performance hub possible. This single-chip device incorporates one upstream and four downstream USB transceivers, a Serial Interface Engine (SIE), USB Hub Controller and Repeater, and four TTs. It is suitable for standalone hubs, motherboard hubs, and monitor hub applications. Being a fixed-function USB device, there is no risk or added engineering effort required for firmware development. The developer does not need to write any firmware for their design. The CY4602 Tetrahub USB 2.0 4-port Hub Reference Design Kit provides all materials and documents needed to move rapidly into production. The reference design kit includes board schematics, bill of materials, Gerber files, Orcad files, key application notes, and product description. CY7C65640A-LFXC is a functional and pin equivalent die revision of Cypress's CY7C65640-LFXC. Changes were made to improve device performance. Verify and select DATA toggle values Port power control and over-current detection. The Hub Controller provides status and control and permits host access to the hub. Hub Repeater The Hub Repeater manages the connectivity between upstream and downstream facing ports that are operating at the same speed. It supports full-/low-speed connectivity and high speed connectivity. Per the USB 2.0 specification, the Hub Repeater provides the following functions: Sets up and tears down connectivity on packet boundaries Ensures orderly entry into and out of the Suspend state, including proper handling of remote wakeups. Transaction Translator The TT basically translates data from one speed to another. A TT takes high speed split transactions and translates them to full-/low-speed transactions when the hub is operating at high speed (the upstream port is connected to a high speed host controller) and has full-/low-speed devices attached. The operating speed of a device attached on a downstream facing port determines whether the Routing Logic connects a port to the Transaction Translator or Hub Repeater section. If a low or full speed device is connected to the hub operating at high speed, the data transfer route includes the transaction translator. If a high speed device is connected to this high speed hub the route only includes the repeater and no transaction translator since the device and the hub are in conformation with respect to their data transfer speed. When the hub is operating at full speed (the upstream port is connected to a full speed host controller), a high speed peripheral will not operate at its full capability. These devices will only work at 1.1 speed. Full- and low-speed devices connected to this hub will operate at their 1.1 speed. TetraHub Architecture The Logic Block Diagram on page 1 shows the TetraHub Architecture. USB Serial Interface Engine (SIE) The SIE allows the CY7C65640A to communicate with the USB host through the USB repeater component of the hub. The SIE handles the following USB bus activity independently of the Hub Control Block: Bit stuffing/unstuffing Checksum generation/checking ACK/NAK/STALL TOKEN type identification Address checking. Applications Standalone Hubs Motherboard Hubs Monitor Hub applications External Personal Storage Drives Port Replicators Portable Drive Docking Stations Hub Controller The Hub Control Block does the following protocol handling at a higher level: Coordinate enumeration by responding to SETUP packets Fill and empty the FIFOs Suspend/Resume coordination Document #: 38-08019 Rev. *J Page 2 of 23 [+] Feedback CY7C65640A Functional Overview The Cypress TetraHub USB 2.0 Hub is a high-performance, low-system-cost solution for USB. The TetraHub USB 2.0 Hub integrates 1.5k upstream pull-up resistors for full speed operation and all downstream 15k pull-down resistors as well as series termination resistors on all upstream and downstream D+ and D- pins. This results in optimization of system costs by providing built-in support for the USB 2.0 specification. the host through the Status Change Endpoint (endpoint 1). Upon receipt of SetPortReset command from the host, the hub will Drive SE0 on the corresponding port Put the port in an enabled state Enable the green port indicator for that port (if not previously overridden by the host) Enable babble detection once the port is enabled. System Initialization On power-up, the TetraHub will read an external SPI EEPROM for configuration information. At the most basic level, this EEPROM will have the Vendor ID (VID), Product ID (PID), and Device ID (DID) for the customer's application. For more specialized applications, other configuration options can be specified. See section for more details. After reading the EEPROM, if BUSPOWER (connected to up-stream VBus) is HIGH, TetraHub will enable the pull-up resistor on the D+ to indicate that it is connected to the upstream hub, after which a USB Bus Reset is expected. During this reset, TetraHub will initiate a chirp to indicate that it is a high speed peripheral. In a USB 2.0 system, the upstream hub will respond with a chirp sequence, and TetraHub will be in a high speed mode, with the upstream D+ pull-up resistor turned off. In USB 1.x systems, no such chirp sequence from the upstream hub will be seen, and TetraHub will operate as a normal 1.x hub (operating at full speed). Babble consists of either unterminated traffic from a downstream port (or loss of activity), or a non-idle condition on the port after EOF2. If babble is detected on an enabled port, that port will be disabled. A ClearPortEnable command from the host will also disable the specified port. Downstream ports can be individually suspended by the host with the SetPortSuspend command. If the hub is not suspended, any resume will be confined to that individual port and reflected to the host through a port change indication in the Hub Status Change Endpoint. If the hub is suspended, a resume on this port will be forwarded to the host, but other resume events will not be seen on that port. The host may resume the port by sending a ClearPortSuspend command. Upstream Port The upstream port includes the transmitter and the receiver state machine. The Transmitter and Receiver operate in high speed and full speed depending on the current hub configuration. The transmitter state machine monitors the upstream facing port while the Hub Repeater has connectivity in the upstream direction. This monitoring activity prevents propagation of erroneous indications in the upstream direction. In particular, this machine prevents babble and disconnect events on the downstream facing ports of this hub from propagating and causing the hub to be disabled or disconnected by the hub to which it is attached. This allows the Hub to only disconnect the offensive port on detecting a babble from it. Enumeration After a USB Bus Reset, TetraHub is in an unaddressed, unconfigured state (configuration value set to 0). During the enumeration process, the host will set the hub's address and configuration by sending a SetCongfiguration request. Changing the hub address will restore it to an unconfigured state. For high speed multi-TT support, the host must also set the alternate interface setting to 1 (the default mode is single-TT). Once the hub is configured, the full hub functionality is available. Power Switching TetraHub includes interface signals for external port power switches. Both ganged and individual (per-port) configurations are supported, with individual switching being the default. Initially all ports are unpowered. After enumerating, the host may power each port by sending a SetPortPower command for that port. The power switching and over-current detection of downstream ports is managed by control pins connected to an external power switch device. PWR [n]# output pins of the CY7C65640A series are connected to the respective external power switch's port power enable signals. (Note that each port power output pin of the external power switch must be bypassed with an electrolytic or tantalum capacitor as required by the USB specification. These capacitors supply the inrush currents, which occur during downstream device hot-attach events.) Multiple Transaction Translator Support After TetraHub is configured in a high speed system, it will be in Single TT mode. The host may then set the hub into Multiple TT mode by sending a SetInterface command. In Multiple TT mode, each full speed port is handled independently and thus has a full 12-Mbps bandwidth available. In Single TT mode, all traffic from the host destined for full- or low-speed ports will be forwarded to all of those ports. This means that the 12-Mbps bandwidth is shared by all full- and low-speed ports. Downstream Ports TetraHub supports a maximum of four downstream ports, each of which may be marked as usable or removable in the extended configuration (0xD2 EEPROM load, see section ). Downstream D+ and D- pull-down resistors are incorporated in TetraHub for each port. Prior to the hub being configured, the ports are driven SE0 (Single Ended Zero, where both D+ and D- are driven LOW) and are set to the unpowered state. Once the hub is configured, the ports are not driven, and the host may power the ports by sending a SetPortPower command to each port. After a port is powered, any connect or disconnect event is detected by the hub. Any change in the port state is reported by the hub back to Document #: 38-08019 Rev. *J Over-current Detection Over-current detection includes timed detection of 8 ms by default. This parameter is configured from the external EEPROM in a range of 0 ms to 15 ms for both an enabled port and a disabled port individually. Detection of over-current on downstream ports is managed by control pins connected to an external power switch device. Page 3 of 23 [+] Feedback CY7C65640A The OVR[n]# pins of the CY7C65640A series are connected to the respective external power switch's port over-current indication (output) signals. Upon detecting an over-current condition, the hub device reports the over-current condition to the host and disables the PWR# output to the external power device. The significance of the color of the LED depends on the operational mode of the TetraHub. There are two modes of operation for the TetraHub port indicators: automatic and manual. On power-up the TeraHub defaults to Automatic Mode, where the color of the Port Indicator (Green, Amber, Off) indicates the functional status of the TetraHub port. In Automatic Mode, TetraHub will turn on the green LED whenever the port is enabled and the amber LED when it has had an over-current condition detected. The color of the port indicator is set by the port state machine. Blinking of the LEDs is not supported in Automatic Mode. Table 1 below identifies the mapping of color to port state in Automatic Mode. In manual mode, the indicators are under the control of the host, which can turn on one of the LEDs, or leave them off. This is done by a system software USB Hub class request. Blinking of the LEDs is supported in Manual Mode. The port indicators allow the user to intervene on any error detection. For example, when babble is detected on plugging in a defective device, or on occurrence of an overcurrent condition, the port indicators corresponding to the downstream port will blink green or only light the amber LED, respectively. Table 2 below displays the color definition of the indicators when TetraHub is in Manual Mode. Port Indicators The USB 2.0 port indicators are also supported directly by TetraHub. As per the specification, each downstream port of the hub supports an optional status indicator. The presence of indicators for downstream facing ports is specified by bit 7 of the wHubCharacteristics field of the hub class descriptor. The default TeraHub descriptor specifies that port indicators are supported (wHubCharacteristics, bit 7 is set). If port indicators are not included in the hub, this should be disabled by the EEPROM. Each port indicator is strategically located directly on the opposite edge of the port which it is associated with. The indicator provides two colors: green and amber. This is implemented as two separate LEDs, one amber and the other green. A combination of hardware and software control is used to inform the user of the current status of the port or the device attached to the port and to guide the user through problem resolution. Colors and blinking are used to provide information to the user. Table 1. Automatic Port State to Port Indicator Color Mapping Port Switching With Without Downstream Facing Hub Port State Powered Off Off or Amber if due to an Overcurrent Condition Off Disconnected, Disabled, Not Enabled, Transmit, Suspended, Resuming, Configured, Resetting, Testing or TransmitR SendEOR, Restart_E/S Off Off or Amber if due to an Overcurrent Condition Green Green Off Off Table 2. Port Indicator Color Definitions in Manual Mode Color Definition Off Amber Green Blinking Off/Green Blinking Off/Amber Blinking Green/Amber Port State Not operational Error condition Fully Operational Software Attention Hardware Attention Reserved Note. Information presented in Table 1 and Table 2 is from USB 2.0 specification Tables 11-6 and 11-7, respectively. Document #: 38-08019 Rev. *J Page 4 of 23 [+] Feedback CY7C65640A Pin Configuration Figure 1. 56-Pin Quad Flat Pack No Leads (8 mm x 8 mm) AMBER#[4] SPI_SCK PWR#[3] OVR#[3] PWR#[4] OVR#[4] SPI_SD RESET GREEN#[4] 43 GND VCC GND GND 56 55 54 53 52 51 50 49 48 47 46 VCC 45 44 DD-[4] 1 2 3 42 AMBER#[3] 41 GREEN#[3] 40 GND DD+[4] VCC GND 4 DD-[3] DD+[3] VCC GND DD-[2] 39 VCC 38 AMBER#[2] 37 GREEN#[2] 36 AMBER#[1] 35 GREEN#[1] 34 GND 33 VCC 32 OVR#[2] 31 PWR#[2] 30 OVR#[1] 5 6 7 8 9 DD+[2] 10 VCC 11 GND 12 DD-[1] 13 DD+[1] 14 29 PWR#[1] 15 VCC 16 GND 17 D- 18 D+ 19 VCC 20 GND 21 XIN 22 XOUT 23 VCC 24 GND 25 SPI_CS 26 BUSPOWER 27 VCC 28 GND Document #: 38-08019 Rev. *J Page 5 of 23 [+] Feedback CY7C65640A Table 0-1. CY7C65640APin Assignments Pin 3 7 11 15 19 23 27 33 39 45 55 4 8 12 16 20 24 28 34 40 47 50 56 21 22 46 Name VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC GND GND GND GND GND GND GND GND GND GND GND GND XIN XOUT RESET# Type Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Power Input Output Input Default N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A Description VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. VCC. This signal provides power to the chip. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. GND. Connect to Ground with as short a path as possible. 24-MHz Crystal IN or External Clock Input. 24-MHz Crystal OUT. Active LOW Reset. This pin resets the entire chip. It is normally tied to VCC through a 100K resistor, and to GND through a 0.1-F capacitor. Other than this, no other special power-up procedure is required. VBUS. Connect to the VBUS pin of the upstream connector. This signal indicates to the hub that it is in a powered state, and may enable the D+ pull-up resistor to indicate a connection. (The hub will do so after the external EEPROM is read, unless it is put into a high speedhigh speedhigh speed mode by the upstream hub). The hub can not be bus powered, and the VBUS signal must not be used as a power source. SPI Chip Select. Connect to CS pin of the EEPROM. SPI Clock. Connect to EEPROM SCK pin. SPI Dataline Connect to GND with 15-K resistor and to the Data I/O pins of the EEPROM. Upstream D- Signal. Upstream D+ Signal. 26 BUSPOWER Input N/A SPI INTERFACE 25 48 49 SPI_CS SPI_SCK SPI_SD O O I/O/Z O O Z UPSTREAM PORT 17 18 D- D+ I/O/Z I/O/Z Z Z Document #: 38-08019 Rev. *J Page 6 of 23 [+] Feedback CY7C65640A Table 0-1. CY7C65640APin Assignments (continued) Pin 13 14 36 35 30 29 9 10 38 37 32 31 5 6 42 41 53 54 1 2 44 43 51 52 Name DD-[1] DD+[1] AMBER#[1] GREEN#[1] OVR#[1] PWR#[1] DD-[2] DD+[2] AMBER#[2] GREEN#[2] OVR#[2] PWR#[2] DD-[3] DD+[3] AMBER#[3] GREEN#[3] OVR#[3] PWR#[3] DD-[4] DD+[4] AMBER#[4] GREEN#[4] OVR#[4] PWR#[4] Type I/O/Z I/O/Z O O Input O/Z I/O/Z I/O/Z O O Input O/Z I/O/Z I/O/Z O O Input O/Z I/O/Z I/O/Z O O Input O/Z Default Z Z 1 1 1 Z Z Z 1 1 1 Z Z Z 1 1 1 Z Z Z 1 1 1 Z Description Downstream D- Signal. Downstream D+ Signal. LED. Driver output for Amber LED. Port Indicator Support. Active LOW. LED. Driver output for Green LED. Port Indicator Support. Active LOW. Overcurrent Condition Detection Input. Active LOW. Power Switch Driver Output. Active LOW. Downstream D- Signal. Downstream D+ Signal. LED. Driver output for Amber LED. Port Indicator Support. Active LOW. LED. Driver output for Green LED. Port Indicator Support. Active LOW. Overcurrent Condition Detection Input. Active LOW. Power Switch Driver Output. Active LOW. Downstream D- Signal. Downstream D+ Signal. LED. Driver output for Amber LED. Port Indicator Support. Active LOW. LED. Driver output for Green LED. Port Indicator Support. Active LOW. Overcurrent Condition Detection Input. Active LOW. Power Switch Driver Output. Active LOW. Downstream D- Signal. Downstream D+ Signal. LED. Driver output for Amber LED. Port Indicator Support. Active LOW. LED. Driver output for Green LED. Port Indicator Support. Active LOW. Overcurrent Condition Detection Input. Active LOW. Power Switch Driver Output. Active LOW. DOWNSTREAM PORT 1 DOWNSTREAM PORT 2 DOWNSTREAM PORT 3 DOWNSTREAM PORT 4 Unused port DD+/DD- lines can be left floating. The port power, amber, and green LED pins should be left unconnected, and the overcurrent pin should be tied HIGH. The overcurrent pin is an input and it should not be left floating. Document #: 38-08019 Rev. *J Page 7 of 23 [+] Feedback CY7C65640A Default Descriptors Device Descriptor The standard device descriptor for TetraHub is based on the VID, PID, and DID found in the SPI EEPROM. This VID/PID/DID in the EEPROM will overwrite the default VID/PID/DID. If no EEPROM is used, the TetraHub enumerates with the following default descriptor values. Table 3. Tetra Hub Descriptor Values Byte 0 1 2,3 4 5 6 7 8,9 10,11 12, 13 14 15 16 17 Full Speed 0x12 0x01 0x0200 0x09 0x00 0x00 0x40 0x04B4 0x6560 0x000B 0x00 0x00 0x00 0x01 High Speed 0x12 0x01 0x0200 0x09 0x00 0x02 0x40 0xx04B4 0x6560 0x000B 0x00 0x00 0x00 0x01 Field Name bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubClass bDeviceProtocol bMaxPacketSize0 wIdVendor wIdProduct wbcdDevice iManufacturer iProduct iSerialNumber bNumConfigurations 18 Bytes DEVICE_DESCRIPTOR USB specification 2.0 HUB None None 64 bytes VID (overwritten by what is defined in EEPROM) PID (overwritten by what is defined in EEPROM) DID (overwritten by what is defined in EEPROM) No manufacturer string supported No product string supported No serial string supported One configuration supported Description Table 4. Configuration Descriptor Byte 0 1 2 4 5 6 7 8 Full Speed 0x09 0x02 0x0019 0x01 0x01 0x00 0xE0 0x32 High Speed 0x09 0x02 0x0029[1] 0x01 0x01 0x00 0xE0 0x32[2] bLength bDescriptorType wTotalLength bNumInterfaces bConfigurationValue iConfiguration bmAttributes bMaxPower Field Name 9 Bytes CONFIG_DESCRIPTOR Length of all other descriptors 1 The configuration to be used Description Table 5. Interface Descriptor Byte 0 1 2 3 4 5 6 7 8 Full Speed 0x09 0x04 0x00 0x00 0x01 0x09 0x00 0x00 0x00 High Speed 0x09 0x04 0x00 0x00 0x01 0x09 0x00 0x01 0x00 Field Name bLength bDescriptorType bInterfaceNumber bAlternateSetting bNumEndpoints bInterfaceClass bInterfaceSubClass bInterfaceProtocol iInterface Description 9 Bytes INTERFACE_DESCRIPTOR Notes 1. This value is reported as 0x19 if the hub is configured in Single-TT mode. 2. This value is configured through the External EEPROM. Document #: 38-08019 Rev. *J Page 8 of 23 [+] Feedback CY7C65640A Table 6. Endpoint Descriptor Byte 0 1 2 3 4,5 6 Full Speed 0x07 0x05 0x81 0x03 0x0001 0xFF High Speed 0x07 0x05 0x81 0x03 0x0001 0x0C bLength bDescriptorType bEndpointAddress bmAttributes wMaxPacketSize bInterval I Field Name 7 Bytes Description ENDPOINT_DESCRIPTOR IN Endpoint #1 Interrupt Maximum Packet Size Polling Rate Table 7. Interface Descriptor[3] Byte 0 1 2 3 4 5 6 7 8 Full Speed N/A N/A N/A N/A N/A N/A N/A N/A N/A Descriptor[3] High Speed 0x07 0x05 0x81 0x03 0x0001 0x0C bLength bDescriptorType bEndpointAddress bmAttributes wMaxPacketSize bInterval High Speed 0x09 0x04 0x00 0x01 0x01 0x09 0x00 0x02 0x00 bLength bDescriptorType bInterfaceNumber bAlternateSetting bNumEndpoints bInterfaceClass Field Name 9 Bytes Description INTERFACE_DESCRIPTOR Interface Descriptor Index Alternate Setting for the Interface Number of Endpoints Defined Interface Class Interface Sub-Class Interface Protocol Interface String Index bInterfaceSubClass bInterfaceProtocol bInterface Table 8. Endpoint Byte 0 1 2 3 4,5 6 Full Speed N/A N/A N/A N/A N/A N/A Field Name 7 Bytes Description ENDPOINT_DESCRIPTOR IN Endpoint #1 Interrupt Maximum Packet Size Polling Rate Table 9. Device Qualifier Descriptor Byte 0 1 2,3 4 5 6 7 8 9 Full Speed 0x0A 0x06 0x0200 0x09 0x00 0x02 0x40 0x01 0x00 High Speed 0x0A 0x06 0x0200 0x09 0x00 0x00 0x40 0x01 0x00 bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubClass bDeviceProtocol bMaxPacketSize0 bNumConfigurations bReserved Field Name 10 Bytes DEVICE_QUALIFIER Description Note 3. If TetraHub is configured for single-TT only (from the external EEPROM), this descriptor is not present. Document #: 38-08019 Rev. *J Page 9 of 23 [+] Feedback CY7C65640A Table 10. Hub Descriptor Byte 0 1 2 3,4 All Speeds 0x09 0x29 0x04[10] 0x0089[10] Field Name bLength bDescriptorType bNbrPorts wHubCharacteristics 9 Bytes HUB Descriptor Number of ports supported b1, b0: Logical Power Switching Mode 00: Ganged power switching (all ports' power at once) 01: Individual port power switching (Default in TetraHub) b2: Identifies a Compound Device, 0: Hub is not part of a compound device (Default in TetraHub), 1: Hub is part of a compound device. b4, b3: Over-current Protection Mode 00: Global Overcurrent Protection. The hub reports overcurrent as a summation of all ports current draw, without a breakdown of individual port overcurrent status. 01: Individual Port Overcurrent Protection. The hub reports overcurrent on a per-port basis. Each port has an over-current status (Default in TetraHub). 1X: No Overcurrent Protection. This option is allowed only for buspowered hubs that do not implement overcurrent protection. b6, b5: TT Think Time 00: TT requires at most 8 FS bit times of inter transaction gap on a full-/low-speed downstream bus (Default in TetraHub). 01: TT requires at most 16 FS bit times. 10: TT requires at most 24 FS bit times. 11: TT requires at most 32 FS bit times. b7: Port Indicators Supported, 0: Port Indicators are not supported on its downstream facing ports and the PORT_INDICATOR request has no effect. 1: Port Indicators are supported on its downstream facing ports and the PORT_INDICATOR request controls the indicators. See Section 4 and 9 (Default in TetraHub). b15...b8: Reserved Time from when the port is powered to when the power is good on that port Maximum current requirement for the Hub Controller Indicates if the port has a removable device attached Required for compatibility with software written for 1.0 compliant devices Description 5 6 7 8 0x32[10] 0x64[10] 0x00[10] 0xFF[10] bPwrOn2PwrGood bHubContrCurrent bDeviceRemovable bPortPwrCtrlMask Note 4. This value is configured through the External EEPROM. Document #: 38-08019 Rev. *J Page 10 of 23 [+] Feedback CY7C65640A Configuration Options Systems using TetraHub must have an external EEPROM in order for the device to have a unique VID, PID, and DID. The TetraHub can talk to SPI EEPROM that are double byte addressable only. TetraHub uses the command format from the '040 parts. The TetraHub cannot talk to `080 EEPROM parts, as the read command format used for talking to `080 is not the same as `040. The '010s and '020s uses the same command format as used to interface with the `040 and hence these can also be used to interface with the TetraHub. Byte 0: 0xD2 Needs to be programmed with 0xD2 Byte 1: VID (LSB) Least Significant Byte of Vendor ID Byte 2: VID (MSB) Most Significant Byte of Vendor ID Byte 3: PID (LSB) Least Significant Byte of Product ID Byte 4: PID (MSB)] Most Significant Byte of Product ID Byte 5: DID (LSB) Least Significant Byte of Device ID Byte 6: DID (MSB)] Most Significant Byte of Device ID Byte 7: EnableOvercurrentTimer[3:0], DisabledOvercurrentTimer[3:0] Count time in ms for filtering overcurrent detection. Bits 7-4 are for an enabled port, and bits 3-0 are for a disabled port. Both range from 0 ms to 15 ms. See section . Default: 8 ms = 0x88. Byte 8: ActivePorts[3:0], RemovablePorts[3:0] Bits 7-4 are the ActivePorts[3:0] bits that indicates if the corresponding port is usable. For example, a two-port hub that uses ports 1 and 4 would set this field to 0x09. The total number of ports reported in the Hub Descriptor: bNbrPorts field is calculated from this. Bits 3-0 are the RemovablePorts[3:0] bits that indicates whether the corresponding port is removable (set to HIGH). This bit's values are recorded appropriately in the HubDescriptor:DeviceRemovable field. Default: 0xFF. Byte 9: MaximumPower This value is reported in the ConfigurationDescriptor:bMaxPower field and is the current in 2-mA intervals that is required from the upstream hub. Default: 0x32 = 100 mA Byte 10: HubControllerPower This value is reported in the HubDescriptor:bHubContrCurrent field and is the current in milliamperes required by the hub controller. Default: 0x64 = 100 mA. Byte 11: PowerOnTimer This value is reported in the HubDescriptor:bPwrOn2PwrGood field and is the time in 2-ms intervals from the SetPortPower command until the power on the corresponding downstream port is good. Default: 0x32 = 100 ms. Byte 12: IllegalHubDescriptor, Unused, FullspeedOnly, NoPortIndicators, Reserved, GangPowered, SingleTTOnly, NoEOPatEOF1 Bit 7: IllegalHubDescriptor: For GetHubDescriptor request, some USB hosts use a DescriptorTypeof 0x00 instead of HUB_DESCRIPTOR, 0x29. According to the USB 2.0 standard, a hub must treat this as a Request Error, and STALL the transaction accordingly (USB 2.0, 11.24.2.5). For systems that do not accept this, the IllegalHubDescriptor configuration bit may be set to allow TetraHub to accept a DescriptorType Page 11 of 23 Default - 0xD0 Load When used in default mode, only a unique VID, PID, and DID must be present in the external SPI EEPROM. The contents of the EEPROM must contain this information in the following format: Byte 0 1 2 3 4 5 6 Value 0xD0 VID (LSB) VID (MSB) PID (LSB) PID (MSB) DID (LSB) DID (MSB) Configured - 0xD2 Load Byte 0 1 2 3 4 5 6 7 8 9 10 11 12 0xD2 VID (LSB) VID (MSB) PID (LSB) PID (MSB) DID (LSB) DID (MSB) EnableOverCurrentTimer[3:0], DisableOvercurrentTimer[3:0] ActivePorts[3:0], RemovablePorts[3:0] MaxPower HubControllerPower PowerOnTimer IllegalHubDescriptor, Unused, FullspeedOnly, NoPortIndicators, Reserved, GangPowered, SingleTTOnly, NoEOPatEOF1 Value (MSB->LSB) Document #: 38-08019 Rev. *J [+] Feedback CY7C65640A of 0x00 for this command. Default is 0, recommended setting is 1. Bit 6: Unused: This bit is an unused, don't care bit and can be set to anything. Bit 5: Fullspeed: Only configures the hub to be a full speed only device. Default set to 0. Bit 4: NoPortIndicators: Turns off the port indicators and does not report them as present in the HubDescriptor, wHubCharacteristics b7 field. Default set to 0. Bit 3: Reserved: This bit is reserved and should not be set to 1. Must be set to 0. Bit 2: GangPowered: Indicates whether the port power switching is ganged (set to 1) or per-port (set to 0). This is reported in the HubDescriptor, wHubCharacteristics field, b4, b3, b1, and b0. Default set to 0. Bit 1: SingleTTOnly: Indicates that the hub should only support single Transaction Translator mode. This changes various descriptor values. Default set to 0. Bit 0: NoEOPatEOF1 turns off the EOP generation at EOF1 in full speed mode. Note that several USB 1.1 hosts can not handle EOPatEOF1 properly. Cypress recommends that this option be turned off for general-purpose hubs. Default is 0, recommended setting is 1. Supported USB Requests Device Class Commands Table 11. Device Class Requests Request GetDeviceStatus GetInterfaceStatus GetEndpointStatus GetDeviceDescriptor GetConfigDescriptor GetDeviceQualifierDescriptor GetOtherSpeedConfigurationDescriptor GetConfiguration[5] SetCongfiguration[5] GetInterface SetInterface SetAddress SetDeviceRemoteWakeup SetDeviceTest_J SetDeviceTest_K SetDeviceTest_SE0_NAK SetDeviceTest_Packet SetEndpointHalt ClearDeviceRemoteWakeup ClearEndpointHalt bmRequestType bRequest 10000000B 10000001B 10000010B 10000000B 10000000B 10000000B 10000000B 10000000B 00000000B 10000001B 00000001B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 0x00 0x00 0x00 0x06 0x06 0x06 0x06 0x08 0x09 0xA 0x0B 0x05 0x03 0x03 0x03 0x03 0x03 0x03 0x01 0x01 wValue 0x0000 0x0000 0x0000 0x0001 0x0002 0x0006 0x0007 0x0000 Configuration Value 0x0000 Alternate Setting 0x01 0x02 0x02 0x02 0x02 0x00 0x01 0x00 wIndex 0x0000 0x0000 0x0000 Zero or Language ID Zero or Language ID Zero or Language ID Zero or Language ID 0x0000 0x0000 0x0000 Interface Number 0x0000 0x0100 0x0200 0x0300 0x0400 0x0000 0x0000 0x0000 wLength 0x0002 0x0002 0x0002 Data 2 Byte Device Status 2 Byte Endpoint Status 2 Byte Endpoint Status Descriptor Descriptor Length Descriptor Descriptor Length Descriptor Descriptor Length Descriptor Descriptor Length 0x0001 0x0000 0x0001 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 Configuration value None Interface Number None None None None None None None None None None Device Address 0x0000 Note 5. Only one configuration is supported in TetraHub. Document #: 38-08019 Rev. *J Page 12 of 23 [+] Feedback CY7C65640A Hub Class Commands Table 12. Hub Class Requests Request GetHubStatus bmRequestType bRequest 10100000B 0x00 wValue 0x0000 wIndex 0x0000 wLength 0x0004 Data Hub Status (See Table 11-19 of Spec) Change Status (See Table 11-20 of Spec) Port Status (See Table 11-21 of Spec) Change Status (See Table 11-20 of Spec) None None GetPortStatus 10100011B 0x00 0x0000 Feature Selectors[6] 0 or 1 Byte 0: 0x00 0x0004 Byte 1: Port 0x0000 0x0000 ClearHubFeature ClearPortFeature 00100000B 00100011B 0x01 0x01 Feature Selectors[6] Byte 0: 0x00 0x0000 1, 2, 8, 16, 17, 18, 19, Byte 1: Port or 20 Byte 0: 0x0000 Feature Selectors[7] Selectors[6] 22 (PORT_INDICATOR) 0, 1, 2, or 3 Byte 1: Port Feature Selector[6] Feature Selectors[6] 2, 4 or 8 Feature Selector[6] 21 (PORT_TEST) 0x0000 Port 0x0000 0x0000 ClearPortFeature 00100011B 0x01 None SetHubFeature SetPortFeature 00100000B 00100011B 0x03 0x03 TetraHub STALLs this request None SetPortFeature 00100011B 0x03 Byte 0: 0x0000 Selectors[8] 1,2, 3, 4 or 5 Byte 1: Port None SetPortFeature 00100011B 0x03 Feature Byte 0: 0x0000 Selector[6] 22 Selectors[7] (PORT_INDICATOR) 0, 1, 2, or 3 Byte 1: Port Descriptor Type and Descriptor Index Dev_Addr, EP_Num 0x0000 TT_Flags 0x0000 TT_Port Hub Descriptor Length 0x0000 None GetHubDescriptor 10100000B 0x06 ClearTTBuffer ResetTT GetTTState StopTT 00100011B 00100000B 10100011B 00100011B 0x08 0x09 0X0A 0x0B None None TT State None Byte 0: 0x00 0x0000 Byte 1: Port Byte 0: 0x00 TT State Byte 1: Port Length Byte 0: 0x00 0x0000 Byte 1: Port Notes 6. Feature selector values for different features are presented in Table 13. 7. Selector values for different features are presented in Table 15. 8. Selector values for different features are presented in Table 14. Document #: 38-08019 Rev. *J Page 13 of 23 [+] Feedback CY7C65640A Table 13. Hub Class Feature Selector Feature Selector C_HUB_LOCAL_POWER C_HUB_OVER_CURRENT PORT_CONNECTION PORT_ENABLE PORT_SUSPEND PORT_RESET PORT_POWER PORT_LOW_SPEED C_PORT_CONNECTION C_PORT_ENABLE C_PORT_SUSPEND C_PORT_OVER_CURRENT C_PORT_RESET PORT_TEST PORT_INDICATOR Recipient Hub Hub Port Port Port Port Port Port Port Port Port Port Port Port Port Value 0 1 0 1 2 4 8 9 16 17 18 19 20 21 22 Table 14. Test Mode Selector for Feature Selector PORT_TEST (0x21) PORT_TEST Mode Description Test_J Test_K Test_SE0_NAK Test_Packet Test_Force_Enable Selector Value 1 2 3 4 5 Table 15. Port Indicator Selector for Feature Selector PORT_INDICATOR (0x22) Port Indicator Color Color Set Automatically as shown in Table 1 Amber Green Off Selector Value 0 1 2 3 Port Indicator Mode Automatic Mode Manual Mode Manual Mode Manual Mode Upstream USB Connection The following is a schematic of the USB upstream connector Figure 2. USB Upstream Port Connection VCC D- D+ GND SHELL 4.7 nF 250V 1 M D- D+ 2.2 F 10V 100 k BUSPOWER Document #: 38-08019 Rev. *J Page 14 of 23 [+] Feedback CY7C65640A Downstream USB Connections The following is a schematic of the USB downstream connector Figure 3. USB Downstream Port Connection. PWRx 150 F 10V 0.01 F DD-[X] VCC D- DD+[X] D+ GND SHELL LED Connections The following is a schematic of the LED circuitry Figure 4. USB Downstream Port Connection. GREEN#[x] 680 3.3V AMBER#[x] 680 Document #: 38-08019 Rev. *J Page 15 of 23 [+] Feedback CY7C65640A Sample Schematic Figure 5. Sample Schematic 5V VCC D- D+ GND SHELL 4.7 nF 250V 1 M AMBER#[1] BUSPOWER PWR1 D- D+ 2.2 F 10V 100 k OVR1 PWR2 Management OVR2 PWR3 OVR3 PWR4 OVR4 PWR4 PWR1 Power PWR3 PWR2 PWR1 150 F 10V DD-[1] DD+[1] 0.01 F VCC D- D+ GND SHELL 3.3V GREEN#[1] 680 680 SPI_SD SPI_SCK SPI_CS SPI EEPROM SPI_SD PWR2 150 F 10V DD-[2] DD+[2] 0.01 F VCC D- D+ GND SHELL 24 MHz 3V 2 7pF 27 pF GREEN#[2] AMBER#[2] 680 3.3V 680 XIN BUSPOWER BUSPOWER GREEN[1] GREEN[1] AMBER[1] AMBER[1] GREEN[2] GREEN[2] AMBER[2] AMBER[2] RESET 0.1F D- DD+ D+ DD-[1] DD-[1] DD+[1] DD+[1] DD-[2] DD-[2] DD+[2] DD+[2] DD-[3] DD-[3] DD+[3] DD+[3] DD-[4] DD-[4] DD+[4] DD+[4] GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GREEN[3] GREEN[3] AMBER[3] AMBER[3] PWR3 150 F 10V DD-[3] DD+[3] 0.01 F VCC D- D+ GND SHELL 3.3 V 3.3V 100K VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 XOUT CY7C65640A-QFN GREEN[4] GREEN[4] AMBER[4] AMBER[4] PWR1 OVR1 PWR2 OVR2 PWR3 OVR3 PWR4 OVR4 SPI_CS PWR1 OVR1 PWR2 OVR2 PWR3 OVR3 PWR4 OVR4 SPI_CS GREEN#[3] AMBER#[3] 680 680 PWR4 150 F 10V DD-[4] DD+[4] 0.01 F VCC D- D+ GND SHELL 3.3 V SPI_SCK SPI_SCK SPI_SD SPI_SD GREEN#[4] AMBER#[4] 680 680 Document #: 38-08019 Rev. *J Page 16 of 23 [+] Feedback CY7C65640A Maximum Ratings Storage Temperature ................................ -65C to +150 C Ambient Temperature with Power Applied ........................................... 0C to +70C Supply Voltage to Ground Potential ...............-0.5V to +4.0V DC Voltage Applied to Outputs in High Z State ....................................... -0.5V to VCC + 0.5V Power Dissipation (4 HS ports)...................................... 1.6W Static Discharge Voltage........................................... > 2000V Max. Output Sink Current per I/O ................................ 10 mA Operating Conditions TA (Ambient Temperature Under Bias) ............. 0C to +70C Supply Voltage............................................+3.15V to +3.45V Ground Voltage.................................................................. 0V FOSC (Oscillator or Crystal Frequency)..... 24 MHz 0.05%, parallel resonant, fundamental mode DC Electrical Characteristics Parameter VCC VIH VIL Il VOH VOL IOH IOL CIN ISUSP ICC Description Supply Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Voltage High Output Low Voltage Output Current High Output Current Low Input Pin Capacitance Suspend Current Supply Current 4 Active ports Full speed Host, Full speed Devices High speed Host, High speed Devices High speed Host, Full speed Devices 2 Active Ports Full speed Host, Full speed Devices High speed Host, High speed Devices High speed Host, Full speed Devices No Active Ports USB Transceiver ZHSDRV Ii IOZ VHSRS Trfi TJA Driver Output Resistance Input Leakage Current Three-state Output OFF-State Current High speed Receiver Sensitivity Level Full speed Frame Jitter Theta Thermal Coefficient Junction to Ambient E-Pad configuration in section at zero airflow 23.27 210 133 41 45 0.1 49 5 10 A A mV ns C/W Full speed Host High speed Host 255 460 395 255 415 380 255 370 mA mA mA mA mA mA mA mA 100 0 < VIN < VCC IOUT = 4 mA IOUT = -4 mA 2.4 0.4 4 4 10 Conditions Min 3.15 2 -0.5 Typ 3.3 Max 3.45 5.25 0.8 10 Unit V V V A V V mA mA pF A Thermal Resistance Document #: 38-08019 Rev. *J Page 17 of 23 [+] Feedback CY7C65640A AC Electrical Characteristics Both the upstream USB transceiver and all four downstream transceivers have passed the USB-IF USB 2.0 Electrical Certification Testing. Table 16. Serial Peripheral Interface Parameter Description Clock Rise/Fall Time Clock Frequency Data Set-up Time Hold Time Reset period Figure 6. Eye Diagram 50 100 1.9 Conditions Min Typ Max 500 250 Unit ns kHz ns ns ms Document #: 38-08019 Rev. *J Page 18 of 23 [+] Feedback CY7C65640A Ordering Information Ordering Code CY7C65640A-LFXC CY7C65640A-LTXC CY7C65640A-LTXCT CY4602 Package Type 56-pin QFN Pb-free Package 56-pin QFN Sawn type 56-pin QFN Sawn type TetraHub USB 2.0 4 port Hub Reference Design Kit Package Diagram The TetraHub is available in a space-saving 56-pin QFN (8 x 8 mm) Figure 7. 56-Pin QFN 8 x 8 MM LF56A 51-85144 *G Document #: 38-08019 Rev. *J Page 19 of 23 [+] Feedback CY7C65640A Figure 8. 56-Pin Sawn QFN (8X8X0.90 MM) 51-85187 *C Note. The bottom metal pad size varies by product due to die size variable. If metal pad design or dimension are critical with your board designs, please contact a Cypress Sales office to get the specific outline option. mask on the top side also minimizes outgassing during the solder reflow process. Please follow the layout guidelines provided in the PCB layout files accompanied with the CY4602 TetraHub Reference Design Kit. The information in this section was derived from the original application note by the package vendor. For further information on this package design please refer to the application note "Surface Mount Assembly of AMKOR's MicroLeadFrame (MLF) Technology". This application note can be downloaded from AMKOR's website from the following URL http://www.amkor.com/products/notes_papers/MLF_AppNote_ 0301.pdf. This application note provides detailed information on board mounting guidelines, soldering flow, rework process, etc. Figure 9 below displays a cross-sectional area underneath the package. The cross section is of only one via. The solder Paste template needs to be designed to allow at least 50% solder coverage. The thickness of the solder paste template should be 5 mil. It is recommended that "No Clean", type 3 solder paste is used for mounting the part. Nitrogen purge is recommended during reflow. Quad Flat Package No Leads (QFN) Package Design Notes The QFN (Quad Flatpack No Leads), being a lead free package, the electrical contact of the part to the Printed Circuit Board (PCB) is made by soldering the lands on the bottom surface of the package to the PCB. Hence special attention is required to the heat transfer area below the package to provide a good thermal bond to the circuit board. A Copper (Cu) fill should be designed into the PCB as a thermal pad under the package. Heat is transferred from the TetraHub through the device's metal paddle on the bottom side of the package. Heat from here is conducted to the PCB at the thermal pad. It is then conducted from the thermal pad to the PCB inner ground plane by a 5 x 5 array of via. A via is a plated through-hole in the PCB with a finished diameter of 13 mil. The QFN's metal die paddle must be soldered to the PCB's thermal pad. Solder mask is placed on the board top side over each via to resist solder flow into the via. The Document #: 38-08019 Rev. *J Page 20 of 23 [+] Feedback CY7C65640A Figure 9. Cross section of the Area Underneath the QFN Package 0.017" dia Solder Mask Cu Fill Cu Fill PCB Material 0.013" dia PCB Material Via hole for thermally connecting the QFN to the circuit board ground plane. This figure only shows the top three layers of the circuit board: Top Solder, PCB Dielectric, and the Ground Plane. Figure 10 is a plot of the solder mask pattern and Figure 11 displays an X-Ray image of the assembly (darker areas indicate solder). Figure 10. Plot of the Solder Mask (White Area) Figure 11. X-Ray Image of the Assembly Document #: 38-08019 Rev. *J Page 21 of 23 [+] Feedback CY7C65640A Document History Page Document Title: CY7C65640A TetraHubTM High Speed USB Hub Controller Document Number: 38-08019 REV. ** *A ECN NO. 113506 116812 Submission Date 04/25/02 08/15/02 Orig. of Change BHA MON Description of Change New Data Sheet (preliminary) Supply voltage range changed from 3.3V-3.6V to 3.15V-3.45 Added EPROM types that can be used with HX2 (p. 14) Added description of bit 7 of Byte 12 (Illegal Hub Descriptor) D2 Load (p. 15) Added high speed sensitivity level of receiver (p. 20) Added QFN package design notes (section 16.1) Fixed the Spec field in the Default Device Descriptor section 7.1 Fixed Interface Protocol field of the interface descriptor, section 7.3 Fixed Device Protocol field of the interface descriptor, section 7.7 Modified table 9-2, section 9.2 Added table 9-4, 9-5, section 9.2 Added table 4-1, 4-2, section 4.8 Added information on bits in wHubCharacterestics, section 7.8 Modified figure 16-1 in QFN package design notes, section 16.1 Included the eye diagram, section 14.4.2 Preliminary to Final Fixed the SPI clock Frequency to 250 KHz, section 14.4.1 Added information on the configuration of unused port pins, section 6.0 Added statement that no special power-up procedure is required, section 6.0 Changed the name of Bit 3 of Byte 12 of EEPROM for a 0xD2 load (section 8.2) from BusPowered to Reserved. Removed all indication to the misconception that the hub can support bus power. Added information as to which nibble of byte 8 in the EEPROM defines the active ports and which nibble defines the removable ports, section 8.2. Added further information on the BUSPOWER pin (pin 26) functionality in section 6.0. Added part number for the lead free package (CY7C65640-LFXC), section 15.0 Changed the name of Bit 6 of Byte 12 of EEPROM for a 0xD2 load from CompoundDevice to Unused, section 8.2. Changed CY7C65640 to CY7C65640A and reformatted to new format Added reset period under AC characteristics. Removed compound device from features list. Updated section 7.1 DID from 0x0007 to 0x000B for rev E silicon. Added theta thermal coefficient junction to ambient (TJA) to section 14.3 Corrected typo in table 6-1. Changed downstream port 4 signal labels from [3] to [4]. Updated package diagram. Updated to new template. *B 118518 10/31/02 MON *C 121793 12/09/02 MON *D 125275 04/02/03 MON *E 234272 see ECN MON *F *G 285171 308296 see ECN see ECN KKU KKU *H *I *J 390258 522224 2657415 see ECN see ECN 02/10/09 KKU TEH DPT/PYRS Added package diagram spec 51-85187, updated package diagram spec 51-85144 and updated Ordering Information table Document #: 38-08019 Rev. *J Page 22 of 23 [+] Feedback CY7C65640A Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General Low Power/Low Voltage Precision Analog LCD Drive CAN 2.0b USB psoc.cypress.com/solutions psoc.cypress.com/low-power psoc.cypress.com/precision-analog psoc.cypress.com/lcd-drive psoc.cypress.com/can psoc.cypress.com/usb (c) Cypress Semiconductor Corporation, 2002-2009. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress' product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-08019 Rev. *J PSoC DesignerTM and Programmable System-on-ChipTM are trademarks and PSoC(R) is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. All products and company names mentioned in this document may be the trademarks of their respective holders. Revised February 10, 2009 Page 23 of 23 [+] Feedback |
Price & Availability of CY7C65640A-LTXC
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |